#--------------------
#Vector Register File
#--------------------

ALLIANCE_TOP	= /opt/alliance-5.0

ENV_ASIMUT	= MBK_CATAL_NAME=CATAL_ASIMUT

ENV_COUGAR	= MBK_SPI_MODEL=$(ALLIANCE_TOP)/etc/spimodel.cfg ;\
		  export MBK_SPI_MODEL;\
		  MBK_IN_PH=ap ;\
		  export MBK_IN_PH;\
		  MBK_OUT_LO=spi;\
		  export MBK_OUT_LO
	
all: translate check-behavioral synthesis place-route transistors

#------------------------------------------------------------------------------
# Translate to Alliance VHDL

translate: and_gate.vbe not_gate.vbe mux.vbe decoder.vbe ffd.vbe vector.vst  vector_register_file.vst

and_gate.vbe: and_gate.vhdl
	vasy -Vaop -I vhdl and_gate

not_gate.vbe: not_gate.vhdl
	vasy -Vaop -I vhdl not_gate

mux.vbe: mux.vhdl
	vasy -Vaop -I vhdl mux

decoder.vbe: decoder.vhdl
	vasy -Vaop -I vhdl decoder

ffd.vbe: ffd.vhdl
	vasy -Vaop -I vhdl ffd

vector.vst : vector.vhdl
	vasy -Vaop -I vhdl vector

vector_register_file.vst: vector_register_file.vhdl
	vasy -Vaop -I vhdl -H vector_register_file

#------------------------------------------------------------------------------
# Simulate the model

check-behavioral: test.pat result_sim.pat

test.pat: test.c
	genpat test

result_sim.pat: vector_register_file.vst test.pat
	$(ENV_ASIMUT) asimut vector_register_file test result_sim

view-behav: result_sim.pat
	xpat -l result_sim 

#------------------------------------------------------------------------------
# Synthesize

synthesis: and_gate.vst not_gate.vst ffd.vst mux.vst decoder.vst vector.vst

and_gate.vst: and_gate_boom.vbe
	boog -m 0 and_gate_boom and_gate
	loon -m 0 -o and_gate

not_gate.vst: not_gate_boom.vbe
	boog -m 0 not_gate_boom not_gate
	loon -m 0 -o not_gate

ffd.vst: ffd_boom.vbe
	boog -m 0 ffd_boom ffd
	loon -m 0 -o ffd

mux.vst: mux_boom.vbe
	boog -m 0 mux_boom mux
	loon -m 0 -o mux

decoder.vst: decoder_boom.vbe
	boog -m 0 decoder_boom decoder
	loon -m 0 -o decoder

and_gate_boom.vbe: and_gate.vbe
	boom -i 10 -d 0 and_gate and_gate_boom

not_gate_boom.vbe: not_gate.vbe
	boom -i 10 -d 0 not_gate not_gate_boom

ffd_boom.vbe: ffd.vbe
	boom -i 10 -d 0 ffd ffd_boom

mux_boom.vbe: mux.vbe
	boom -i 10 -d 0 mux mux_boom

decoder_boom.vbe: decoder.vbe
	boom -i 10 -d 0 decoder decoder_boom

view-gates: vector_register_file.vst and_gate.vst not_gate.vst ffd.vst mux.vst decoder.vst vector.vst
	xsch -l vector_register_file

#------------------------------------------------------------------------------
# Place and Route

place-route: vector_register_file_ocp.ap vector_register_file_nero.ap vector_register_file_s2r.cif

vector_register_file_ocp.ap: vector_register_file.vst
	ocp vector_register_file vector_register_file_ocp

vector_register_file_nero.ap: vector_register_file_ocp.ap vector_register_file.vst
	nero -p vector_register_file_ocp vector_register_file vector_register_file_nero

vector_register_file_s2r.cif: vector_register_file_nero.ap
	s2r vector_register_file_nero vector_register_file_s2r

view-place: synthesis vector_register_file_ocp.ap
	graal -l vector_register_file_ocp

view-route: synthesis vector_register_file_nero.ap
	graal -l vector_register_file_nero

view-real: synthesis vector_register_file_s2r.cif
	dreal -l vector_register_file_s2r

#------------------------------------------------------------------------------
# Extract transistor netlist

transistors: vector_register_file_transistors.spi

vector_register_file_transistors.spi: vector_register_file_nero.ap
	$(ENV_COUGAR); cougar -t vector_register_file_nero vector_register_file_transistors

view-transistors: vector_register_file_transistors.spi
	$(ENV_COUGAR); xsch -I spi -l vector_register_file_transistors

#------------------------------------------------------------------------------
	
clean:
	rm -rf  *.pat \
		*.vst \
		*.xsc \
		*.vbe \
		*.boom \
		*.ap \
		*.cif \
		*.spi \
		*.dat
	clear

